1. Field of the Invention
This invention generally relates to a method for fabricating a semiconductor device and more particularly to a method of bevel trimming a three dimensional (3D) semiconductor device.
2. Description of the Related Art
Since the invention of integrated circuit, the semiconductor industry has experienced continued rapid growth due to continuous improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For most part, this improvement in integration density has come from repeated reductions in minimum feature sizes, which allows more components to be integrated into a given area.
These integration improvements are essentially two-dimensional (2D) in nature, in that the volume occupied by the integrated components is essentially on the surface of the semiconductor wafer. Although dramatic improvements in lithography have resulted in considerable improvements in two dimensional (2D) integrated circuit formation, there are physical limits to the density that can be achieved in two dimensions. One of these limits is the minimum size needed to make these components. Also, when more devices are put into one chip, more complex designs are required.
An additional limit comes from the significant increase in the number and the length of interconnections between devices as the number of devices increases. When the number and length of interconnections increase, both circuit RC delay and power consumption increases. Three-dimensional (3D) integrated circuits (ICs) are therefore created to resolve the above-discussed limitations. In a typical formation of a 3D IC, wafer thinning is an important process. FIG. 1A-FIG. 1B show one issue generated from the wafer thinning process when fabricating a three dimensional semiconductor device. Referring to FIG. 1A, a wafer 102 which has curve-shaped edges is provided. A device structure 104 comprising stack layers (not shown) is formed on the wafer 102 for forming integrated circuits. Next, referring to FIG. 1B, the wafer 102 is thinned by grinding. Due to the curve-shaped edges, the wafer 102 has a sharp edge 106 after thinning. The wafer with a sharp edge is likely to crack along defects. Further, it is dangerous to carry the wafer 102 with the sharp edge.